Interactive CPU Simulator

Visualize assembly execution step-by-step.

1. Conditional Logic (`if` statement)

Problem: Translate the C code for an OR condition into assembly. `x` is in R1, `y` in R2, `z` in R3, and `a` in R8.

Initial Register Values

CPU State

R1 (x)
?
R2 (y)
?
R3 (z)
?
R8 (a)
?

High-Level Code

if ((x > y) || (z > 0)) {
a++;
}

Assembly Code

CMP R1, R2
BGT L1
CMP R3, #0
BLE L2
L1: INC R8
L2: ...

Explanation

Press 'Reset / Start' to begin the simulation.

2. Memory and Endianness

Problem: A processor uses big-endian representation. If a 32-bit integer `int x = 127;` is stored starting at memory address `100`, what is in memory location `103`? And how is `12345678H` stored?

Input Value

For `int x = 127`, the 32-bit hex value is `0000007F`.

Memory Layout (starting at address 100)

Big-Endian

Addr 100
?
Addr 101
?
Addr 102
?
Addr 103
?

Little-Endian

Addr 100
?
Addr 101
?
Addr 102
?
Addr 103
?

Explanation

Big-endian stores the most significant byte at the lowest address. Little-endian stores the least significant byte at the lowest address.

3. The `while` Loop

Problem: Translate a `while` loop into assembly. `a` is in R1 and `i` is in R2.

Initial Register Values

CPU State

R1 (a)
?
R2 (i)
?

High-Level Code

while (a != 1) {
a--;
i++;
}

Assembly Code

LOOP: CMP R1, #1
BEZ EXIT
DEC R1
INC R2
JMP LOOP
EXIT: ...

Explanation

Press 'Reset / Start' to begin the simulation.

4. The `for` Loop

Problem: Translate a `for` loop that sums numbers into assembly. `i` is in R1 and the sum `a` is in R8.

Initial Register Values

CPU State

R1 (i)
?
R8 (a)
?

High-Level Code

for (i=x, a=0; i>0; i--) {
a += i;
}

Assembly Code

MOV R1_INIT, R1
MOV #0, R8
LOOP: CMP R1, #0
BLE END
ADD R8, R1
DEC R1
JMP LOOP
END: ...

Explanation

Press 'Reset / Start' to begin the simulation.

5. Instruction Format Design

Problem: A computer has a 32-bit instruction format. Given the memory size, number of registers, and addressing modes, calculate the bits required for each field.

System Parameters

Calculated Field Sizes (Total 32 bits)

Opcode
? bits
Mode
? bits
Register
? bits
Address
? bits

Explanation

The number of bits `n` needed to represent `N` items is `ceil(log2(N))`. The opcode field takes the remaining bits.

6. Bitwise & Arithmetic Operations

Problem: Execute a sequence of arithmetic and bitwise instructions. Initial values: R0 = 77H, R1 = 80H.

Initial Register Values (8-bit Hex)

CPU State (Hex)

R0
?
R1
?

C Equivalents

R1 = R1 - R0;
R0 = R0 ^ R0;
R1 = R1 >> 3; // Arithmetic
R0 = rotl(R0, 3);

Assembly Code

Subtract R1, R0
XOR R0, R0
AShiftR #3, R1
RotateL #3, R0
...

Explanation

Press 'Reset / Start' to begin the simulation.

7. Array Copy Loop

Problem: Implement `for (i=0; i<10; i++) {a[i] = b[i];}` in assembly. R1 points to array `a`, R2 points to array `b`, and R3 is the counter `i`.

CPU & Memory State

R1 (ptr_a)
?
R2 (ptr_b)
?
R3 (i)
?

Array b (Source)

Array a (Destination)

High-Level Code

for(i=0; i<10; i++) {
a[i] = b[i];
}

Assembly Code

MOV #A_ADDR, R1
MOV #B_ADDR, R2
MOV #0, R3
LOOP: CMP R3, #10
BGE END
MOV (R2)+, (R1)+
INC R3
JMP LOOP
END: ...

Explanation

Press 'Reset / Start' to begin the simulation.